.text
.global _start
_start:
ldrsp,=4096
bldisable_watch_dog
blmemsetup
blnand_init
ldrr0,=0x30000000
movr1,#4096
movr2,#2048
blnand_read
ldrsp,=0x34000000
ldrlr,=halt_loop
ldrpc,=main
halt_loop:
bhalt_loop
#define WATCH_DOG(*(volatile unsigned long *)0x53000000)
#define MEM_CTL_BASE0X48000000
void disable_watch_dog();
void memsetup();
void disable_watch_dog()
{
WATCH_DOG=0;
}
void memsetup()
{
int i=0;
unsigned long *p=(unsigned long *)MEM_CTL_BASE;
unsigned long const mem_cfg_val[]={0x22011110,//BWSCON
0x00000700,//BANKCON0
0x00000700,//BANKCON1
0x00000700,//BANKCON2
0x00000700,//BANKCON3
0x00000700,//BANKCON4
0x00000700,//BANKCON5
0x00018005,//BANKCON6
0x00018005,//BANKCON7
0x008C07A3,//refresh
0x000000b1,//BANKSIZE
0x00000030,//MRSRB6
0x00000030,//MRSRB7
};
for(;i<13;i++)
p[i]=mem_cfg_val[i];
}
#define LARGER_NAND_PAGE
#define GSTATUS1(*(volatile unsigned int *)0x560000B0)
#define BUSY1
#define NAND_SECTOR_SIZE512
#define NAND_BLOCK_MASK(NAND_SECTOR_SIZE - 1)
#define NAND_SECTOR_SIZE_LP2048
#define NAND_BLOCK_MASK_LP(NAND_SECTOR_SIZE_LP - 1)
typedef unsigned int S3C24X0_REG32;
typedef struct {
S3C24X0_REG32NFCONF;
S3C24X0_REG32NFCMD;
S3C24X0_REG32NFADDR;
S3C24X0_REG32NFDATA;
S3C24X0_REG32NFSTAT;
S3C24X0_REG32NFECC;
} S3C2410_NAND;
typedef struct {
S3C24X0_REG32NFCONF;
S3C24X0_REG32NFCONT;
S3C24X0_REG32NFCMD;
S3C24X0_REG32NFADDR;
S3C24X0_REG32NFDATA;
S3C24X0_REG32NFMECCD0;
S3C24X0_REG32NFMECCD1;
S3C24X0_REG32NFSECCD;
S3C24X0_REG32NFSTAT;
S3C24X0_REG32NFESTAT0;
S3C24X0_REG32NFESTAT1;
S3C24X0_REG32NFMECC0;
S3C24X0_REG32NFMECC1;
S3C24X0_REG32NFSECC;
S3C24X0_REG32NFSBLK;
S3C24X0_REG32NFEBLK;
} S3C2440_NAND;
typedef struct {
void (*nand_reset)(void);
void (*wait_idle)(void);
void (*nand_select_chip)(void);
void (*nand_deselect_chip)(void);
void (*write_cmd)(int cmd);
void (*write_addr)(unsigned int addr);
unsigned char (*read_data)(void);
}t_nand_chip;
static S3C2410_NAND * s3c2410nand = (S3C2410_NAND *)0x4e000000;
static S3C2440_NAND * s3c2440nand = (S3C2440_NAND *)0x4e000000;
static t_nand_chip nand_chip;
void nand_init(void);
void nand_read(unsigned char *buf, unsigned long start_addr, int size);
static void nand_reset(void);
static void wait_idle(void);
static void nand_select_chip(void);
static void nand_deselect_chip(void);
static void write_cmd(int cmd);
static void write_addr(unsigned int addr);
static unsigned char read_data(void);
static void s3c2410_nand_reset(void);
static void s3c2410_wait_idle(void);
static void s3c2410_nand_select_chip(void);
static void s3c2410_nand_deselect_chip(void);
static void s3c2410_write_cmd(int cmd);
static void s3c2410_write_addr(unsigned int addr);
static unsigned char s3c2410_read_data();
static void s3c2440_nand_reset(void);
static void s3c2440_wait_idle(void);
static void s3c2440_nand_select_chip(void);
static void s3c2440_nand_deselect_chip(void);
static void s3c2440_write_cmd(int cmd);
static void s3c2440_write_addr(unsigned int addr);
static unsigned char s3c2440_read_data(void);
static void s3c2410_nand_reset(void)
{
s3c2410_nand_select_chip();
s3c2410_write_cmd(0xff);// 復(fù)位命令
s3c2410_wait_idle();
s3c2410_nand_deselect_chip();
}
static void s3c2410_wait_idle(void)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFSTAT;
while(!(*p & BUSY))
for(i=0; i<10; i++);
}
static void s3c2410_nand_select_chip(void)
{
int i;
s3c2410nand->NFCONF &= ~(1<<11);
for(i=0; i<10; i++);
}
static void s3c2410_nand_deselect_chip(void)
{
s3c2410nand->NFCONF |= (1<<11);
}
static void s3c2410_write_cmd(int cmd)
{
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFCMD;
*p = cmd;
}
static void s3c2410_write_addr(unsigned int addr)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFADDR;
*p = addr & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 9) & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 17) & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 25) & 0xff;
for(i=0; i<10; i++);
}
static unsigned char s3c2410_read_data(void)
{
volatile unsigned char *p = (volatile unsigned char *)&s3c2410nand->NFDATA;
return *p;
}
static void s3c2440_nand_reset(void)
{
s3c2440_nand_select_chip();
s3c2440_write_cmd(0xff);// 復(fù)位命令
s3c2440_wait_idle();
s3c2440_nand_deselect_chip();
}
static void s3c2440_wait_idle(void)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2440nand->NFSTAT;
while(!(*p & BUSY))
for(i=0; i<10; i++);
}
static void s3c2440_nand_select_chip(void)
{
int i;
s3c2440nand->NFCONT &= ~(1<<1);
for(i=0; i<10; i++);
}
static void s3c2440_nand_deselect_chip(void)
{
s3c2440nand->NFCONT |= (1<<1);
}
static void s3c2440_write_cmd(int cmd)
{
volatile unsigned char *p = (volatile unsigned char *)&s3c2440nand->NFCMD;
*p = cmd;
}
static void s3c2440_write_addr(unsigned int addr)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2440nand->NFADDR;
*p = addr & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 9) & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 17) & 0xff;
for(i=0; i<10; i++);
*p = (addr >> 25) & 0xff;
for(i=0; i<10; i++);
}
static void s3c2440_write_addr_lp(unsigned int addr)
{
int i;
volatile unsigned char *p = (volatile unsigned char *)&s3c2440nand->NFADDR;
int col, page;
col = addr & NAND_BLOCK_MASK_LP;
page = addr / NAND_SECTOR_SIZE_LP;
*p = col & 0xff;
for(i=0; i<10; i++);
*p = (col >> 8) & 0x0f;
for(i=0; i<10; i++);
*p = page & 0xff;
for(i=0; i<10; i++);
*p = (page >> 8) & 0xff;
for(i=0; i<10; i++);
*p = (page >> 16) & 0x03;
for(i=0; i<10; i++);
}
static unsigned char s3c2440_read_data(void)
{
volatile unsigned char *p = (volatile unsigned char *)&s3c2440nand->NFDATA;
return *p;
}
static void nand_reset(void)
{
nand_chip.nand_reset();
}
static void wait_idle(void)
{
nand_chip.wait_idle();
}
static void nand_select_chip(void)
{
int i;
nand_chip.nand_select_chip();
for(i=0; i<10; i++);
}
static void nand_deselect_chip(void)
{
nand_chip.nand_deselect_chip();
}
static void write_cmd(int cmd)
{
nand_chip.write_cmd(cmd);
}
static void write_addr(unsigned int addr)
{
nand_chip.write_addr(addr);
}
static unsigned char read_data(void)
{
return nand_chip.read_data();
}
void nand_init(void)
{
#define TACLS0
#define TWRPH03
#define TWRPH10
if ((GSTATUS1 == 0x32410000) || (GSTATUS1 == 0x32410002))
{
nand_chip.nand_reset= s3c2410_nand_reset;
nand_chip.wait_idle= s3c2410_wait_idle;
nand_chip.nand_select_chip= s3c2410_nand_select_chip;
nand_chip.nand_deselect_chip = s3c2410_nand_deselect_chip;
nand_chip.write_cmd= s3c2410_write_cmd;
nand_chip.write_addr= s3c2410_write_addr;
nand_chip.read_data= s3c2410_read_data;
s3c2410nand->NFCONF = (1<<15)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);
}
else
{
nand_chip.nand_reset= s3c2440_nand_reset;
nand_chip.wait_idle= s3c2440_wait_idle;
nand_chip.nand_select_chip= s3c2440_nand_select_chip;
nand_chip.nand_deselect_chip = s3c2440_nand_deselect_chip;
nand_chip.write_cmd= s3c2440_write_cmd;
#ifdef LARGER_NAND_PAGE
nand_chip.write_addr= s3c2440_write_addr_lp;
#else
nand_chip.write_addr= s3c2440_write_addr;
#endif
nand_chip.read_data= s3c2440_read_data;
s3c2440nand->NFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4);
s3c2440nand->NFCONT = (1<<4)|(1<<1)|(1<<0);
}
nand_reset();
}
void nand_read(unsigned char *buf, unsigned long start_addr, int size)
{
int i, j;
#ifdef LARGER_NAND_PAGE
if ((start_addr & NAND_BLOCK_MASK_LP) || (size & NAND_BLOCK_MASK_LP)) {
return ;
}
#else
if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
return ;
}
#endif
nand_select_chip();
for(i=start_addr; i < (start_addr + size);) {
write_cmd(0);
write_addr(i);
#ifdef LARGER_NAND_PAGE
write_cmd(0x30);
#endif
wait_idle();
#ifdef LARGER_NAND_PAGE
for(j=0; j < NAND_SECTOR_SIZE_LP; j++, i++) {
#else
for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {
#endif
*buf = read_data();
buf++;
}
}
nand_deselect_chip();
return ;
}
#define GPFCON(*(volatile unsigned long *)0x56000050)
#define GPFDAT(*(volatile unsigned long *)0x56000054)
#defineGPF4_OUT(1<<(2*4))
#define GPF5_OUT(1<<(2*5))
#define GPF6_OUT(1<<(2*6))
void Delay(volatile unsigned long dly)
{
for(;dly>0;dly--);
}
int main(void)
{
unsigned long i=0;
GPFCON=GPF4_OUT|GPF5_OUT|GPF6_OUT;
while(1)
{
Delay(20000);
GPFDAT=(~(i<<4));
if(++i==8)
i=0;
}
return 0;
}
nand.lds:
SECTIONS{
firtst0x00000000 : { head.o init.o nand.o }
second0x30000000 : AT(4096) { main.o }
}
Makefile:
objs := head.o init.o nand.o main.o
nand.bin : $(objs)
arm-linux-ld -Tnand.lds-o nand_elf $^
arm-linux-objcopy -O binary -S nand_elf $@
arm-linux-objdump -D -m armnand_elf > nand.dis
%.o:%.c
arm-linux-gcc -Wall -c -O2 -o $@ $<
%.o:%.S
arm-linux-gcc -Wall -c -O2 -o $@ $<
clean:
rm -fnand.dis nand.bin nand_elf *.o2017-11-17
[導(dǎo)讀].text.global _start_start:ldrsp,=4096bldisable_watch_dogblmemsetupblnand_initldrr0,=0x30000000movr1,#4096movr2,#2048blnand_readldrsp,=0x34000000ldrlr,=halt_loopldrpc,=mainhalt_loop:bhalt_loop#define W
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