MC33905是第二代系統(tǒng)基本芯片(SBC),包括有多中特性和增強的模塊設(shè)計,能作為MCU和其它集成電路如傳感器,CAN收發(fā)器的先進的功率管理單元. MC33905內(nèi)置了高速CAN接口(ISO11898-2 和-5),以及本地和總線故障診斷,保護以及故障安全操作模式等.本文介紹了MC33905主要特性,方框圖,以及簡化應(yīng)用框圖和典型應(yīng)用電路, MC33905評估板EVB主要特性, 電路圖和材料清單(BOM).

The 33904/5 is the second generation family of System Basis Chips which combine several features and enhance present module designs. The device works as an advanced power management unit for the MCU and additional integrated circuits such as sensors, CAN transceivers. It has a built-in enhanced high speed CAN interface (ISO11898-2 and -5), with local and bus failure diagnostics, protection, and fail safe operation mode. The SBC may include one or two LIN 2.1 interfaces with LIN output pin switches. It includes up to 4 wake-up input pins than can also be configured as output drivers for flexibility.

This device implements multiple Low Power modes, with very low-current consumption. In addition, the device is part of a family concept where pin compatibility, among the various devices with and without LIN interfaces, add versatility to module design.

The 33904/5 also implements an innovative and advanced fail-safe state machine and concept solution.

MC33904/5主要特性:

•Protected 5.0V or 3.3V regulators for MCU (part number selectable) and additional ICs (SPI configurable) with optional external PNP usage to increase current capability for MCU.

•Fully-protected embedded 5.0 V regulator for the CAN driver

•Extremely low quiescent current in low power modes

•Multiple under-voltage detections to address various MCU specifications and system operation modes (i.e. cranking)

•Multiple wake-up sources in low power modes: CAN or LIN bus, I/O transition, automatic timer, SPI message, and VDD over-current detection.

•Voltage, current and temperature protection with enhanced diagnostics that can be monitored by system via MUX output

•ISO11898-5 high speed CAN interface compatibility for baud rates of 40 kb/s to 1.0 Mb/s. LIN 2.1 and J2602 LIN interface compatibility

•Pb-free packaging designated by suffix code EK


圖1.MC33905D內(nèi)部方框圖

圖2.MC33905S內(nèi)部方框圖

圖3.MC33904A內(nèi)部方框圖

圖4.MC33905D簡化應(yīng)用方框圖
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圖5.MC33905S簡化應(yīng)用方框圖

圖6.MC33905A簡化應(yīng)用方框圖

圖7.MC33905D典型應(yīng)用電路圖

圖8.MC33905S典型應(yīng)用電路圖
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圖9.MC33905A典型應(yīng)用電路圖

MC33905評估板EVB

This EVB includes two I/O test points that can be configured to be pulled up to VSup or pulled down to GND through a resistor and indicator LED. These are easily configured via jumper settings. The SBC can also be exercised in debug mode (watchdog re-fresh/monitoring not needed) by simply populating a jumper. Separating the input supply voltage to VSup1 and VSup2 is also made simple with a jumper configuration. Specified resistor pull-downs can be implemented on DBG and MUX pins via simple jumper configurations. The status of I/O0, I/O1, VAUX, 5V_CAN, SAFE and VDD can be visually monitored via on-board LEDs. The CAN and LIN Bus signals are provided through terminal block connectors.

An isolated terminal block connector is implemented to provide power to the evaluation board with an external DC power supply.

The evaluation board is operated through the graphical user interface paired up with the SPI dongle board (KITUSBSPIDGLEVME) through the 2x8 pin ribbon cable. Additionally, for added flexibility, the user can implement a custom board with a microcontroller to talk to the SBC via the 16 pin header.

MC33905評估板EVB主要特性:

•Nominal operating supply voltage range of 5.5V to 27V

•Individually routed power supply inputs for VSup1 and VSup2

•5.0 V regulator for MCU with external PNP ballast transistor to increase current capability.

•Multiple CAN Bus termination options supported via socket

•Two high/low side I/Os (SPI configurable) accessible through test points.

•Status of I/O0 and I/O1 indicated by LED (dependent on jumper configuration)

•Debug Mode/watchdog configuration via jumper settings

•MUX output voltage accessible through test point and external resistor selectable through jumper

•3.3 V or 5.0 V output voltage test point VAUX (SPI configurable)

•I_WAKE_I test point to enable a FET and load VDD with current to wake up the SBC.

•LIN1_T and LIN2_T test points to monitor I/O voltages (SPI configurable)

•I/O0, I/O1, VAUX, 5V_CAN, SAFE and VDD status indicated by LED

•100mil 2x8-pin standard header connector for SPI communication

•100mil 16-pin standard header connector for custom MCU board connection


圖10.MC33905評估板KIT33905D5EKEVBE外形圖
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圖11.評估板KIT33905D5EKEVBE建立配置方框圖

圖12.評估板KIT33905D5EKEVBE電路圖

評估板KIT33905D5EKEVBE材料清單(BOM):